Układy CMOS serii 4000 (spis), Elektronika

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4000 Dual 3-input NOR gates and inverter.4001 Quad 2-input NOR gates.4002 Dual 4-input NOR gates.4006 Dual 4-bit and dual 5-bit serial-in serial-out shift registers with common clock.4007 Dual complementary CMOS pair and unbuffered inverter. For use as simple inverters, connect 1pS=3pS=VCC, 1nS=3nS=GND, 1pD=1nD=/1Y and 2pD=2nD=/2Y.4008 4-bit binary full adder with fast carry.4009 Hex inverters with level shifted outputs. VDD may not be lower than VCC.4010 Hex buffers with level shifted outputs. VDD may not be lower than VCC.4011 Quad 2-input NAND gates.4012 Dual 4-input NAND gates.4013 Dual D flip-flop with set and reset.4014 8-bit parallel-in serial-out shift register with three parallel outputs.4015 Dual 4-bit serial-in parallel-out shift register with asynchronous reset.4016 Quad analog switches.4017 4-bit asynchronous decade counter with fully decoded outputs, reset and both active high and active low clocks.4018 5-stage (divide by 2,4,6,8 or 10) Johnson counter with preset inputs.4019 8-to-4 line noninverting data selector/multiplexer with OR function.4020 14-bit asynchronous binary counter with reset. Q1 and Q2 outputs missing.4021 8-bit parallel-in serial-out shift register with asynchronous load input and three parallel outputs.4022 3-bit asynchronous binary counter with fully decoded outputs, reset and both active high and active low clocks.4023 Triple 3-input NAND gates.4024 7-bit asynchronous binary counter with reset.4025 Triple 3-input NOR gates.4026 4-bit asynchronous decade counter with 7-segment decoder/common-cathode LED driver, display enable, ripple carry, reset and both active high and active low clocks.4027 Dual J-K flip-flops with set and reset.4028 1-of-10 noninverting decoder/demultiplexer.4029 4-bit synchronous binary/decade up/down counter with preset and ripple carry output.4030 Quad 2-input XOR gates.4031 64-bit serial-in serial-out shift register with multiplexed inputs. Y is Q63 delayed by half a cycle (i.e. clocked on falling edge).4032 Triple serial adder. Each section can be used to add long binary words, one bit on each clock cycle. CRST resets the internal carry flip-flop after one clock delay. The INV inputs can be used to invert the sum output (giving a 1's-complemented result).4033 4-bit asynchronous decade counter with 7-segment decoder/common-cathode LED driver, ripple blanking, ripple carry, reset and both active high and active low clocks.4034 8-bit bidirectional universal shift register with common serial input, dual parallel I/O ports and selectable synchronous/asynchronous parallel load.4035 4-bit inverting/noninverting universal shift register with J-/K inputs and asynchronous reset.4038 Triple negative-edge-triggered serial adder. Each section can be used to add long binary words, one bit on each clock cycle. CRST resets the internal carry flip-flop after one clock delay. The INV inputs can be used to invert the sum output (giving a 1's-complemented result).4040 12-bit asynchronous binary counter with reset.4041 Quad buffers with complementary outputs.4042 4-bit transparent latch with selectable latch enable polarity and complementary outputs.4043 Quad 3-state S-R latches with overriding set.4044 Quad 3-state S-R latches with overriding reset.4045 21-bit asynchronous binary counter with oscillator and reset input. Only two 3% duty cycle outputs (180` out of phase) from the last counter stage are available. Can be used to generate a 1Hz clock signal using a 2.097152MHz crystal. P and N MOSFET source connections from the oscillator inverter are brought out of the package to allow the use of source resistors, but usually pS=VCC and nS=GND.4046 Phase Locked Loop.4047 Low-power astable/monostable multivibrator with oscillator output.4048 3-state 8-input multifunction gate.4049 Hex inverters with high-to-low level shifter inputs.4066 Quad analog switches.406716-to-1 line analog multiplexer/demultiplexer.40688-input AND/NAND gate with complementary outputs.4069Hex inverters.4070Quad 2-input XOR gates.4071Quad 2-input OR gates.4072Dual 4-input OR gates.4073Triple 3-input AND gates.4075Triple 3-input OR gates.40764-bit 3-state D flip-flop with reset, dual clock enables and dual output enables.4077Quad 2-input XNOR gates.40788-input OR/NOR gate with complementary outputs.4081Quad 2-input AND gates.4082Dual 4-input AND gates.4085Dual 3-wide 2/1-input AND-NOR gates.40866-wide 2/1-input AND-NOR gate.40894-bit synchronous binary rate multiplier.4093Quad 2-input NAND gates with schmitt-trigger inputs.0.9V typical input hysteresis at VCC=+5V and 2.3V at VCC=+10V.40948-bit 3-state serial-in parallel-out shift register with output latches.Q7' is Q7 delayed by half a cycle (i.e. clocked on falling edge).4095J-K flip-flop with triple ANDed J an K inputs, set and reset.4096J-K flip-flop with triple ANDed J an K inputs (one inverted), set and reset.409716-to-2 line analog multiplexer/demultiplexer.4098Dual monostable multivibrator, retriggerable, resettable.40991-of-8 addressable latch with reset.4010032-bit bidirectional serial-in serial-out shift register with two AND gated clocks.With /LOOP input low, data is rotated and serial data input ignored.401019-bit odd/even parity generator/checker.401028-bit (2-digit) synchronous decade down counter with synchronous and asynchronous load andreset. Counter outputs only internally connected but ripple carry and zero detect outputsavailable.401038-bit synchronous binary down counter with synchronous and asynchronous load and reset.Counter outputs only internally connected but ripple carry and zero detect outputs available.401044-bit 3-state bidirectional universal shift register.4010516x4 3-state asynchronous FIFO with reset.40106Hex inverters with schmitt-trigger inputs.0.9V typical input hysteresis at VCC=+5V and 2.3V at VCC=+10V.40107Dual 2-input open-collector NAND gates with buffered output.401084x4-bit 3-state synchronous triple-port register file.40109Quad 3-state noninverting buffer/level shifter.VDD supplies the output stage, VCC the input stage.401104-bit asynchronous decade up/down counter with 7-segment decoder/common- cathode LED driver,ripple carry and borrow, separate up and down clocks, clock enable and output latch.4014710-to-4 line noninverting priority encoder.401604-bit synchronous decade counter with load, asynchronous reset, and ripple carry output.401614-bit synchronous binary counter with load, asynchronous reset, and ripple carry output.401624-bit synchronous decade counter with load, reset, and ripple carry output.401634-bit synchronous binary counter with load, reset, and ripple carry output.401746-bit D flip-flop with reset.401814-bit 16-function arithmetic logic unit (ALU)40182Look-ahead carry generator Capable of anticipating a carry across four binary adders or groupof adders.Cascadable to perform full look-ahead across n-bit adders.401924-bit synchronous decade up/down counter with asynchronous load and reset, and separate up anddown clocks, carry and borrow outputs.401934-bit synchronous binary up/down counter with asynchronous load and reset, and separate up anddown clocks. Carry and borrow outputs.401944-bit bidirectional universal shift register with asynchronous reset.402084x4-bit 3-state synchronous triple-port register file.402578-to-4 line 3-state noninverting data selector/multiplexer.4316Quad analog switches with enable input and dual power supply.VEE supply may not be more positive than GND.43518-to-1 line analog multiplexer/demultiplexer with address latch and dual power supply.VEE supply may not be more positive than GND.43528-to-2 line analog multiplexer/demultiplexer with address latch and dual power supply.VEE supply may not be more positive than GND.4353Triple 2-to-1 line analog multiplexer/demultiplexer with address latch and dual power supply.VEE supply may not be more positive than GND.4500Industrial Control Unit.If you _really_ want to use this RRRRISC, try to get the 'MC14500B Industrial Control UnitHandbook' from Motorola (sorry, no ISBN number).+---+--+---+RST |1 +--+ 16| VCCWR |2 15| RRD |3 14| X0I3 |4 13| X1I2 |5 4500 12| JMPI1 |6 11| RTNI0 |7 10| FLG0GND |8 9| FLGF+----------+45026-bit 3-state inverting buffer/line driver with NOR inputs.+---+--+---+ +---+---+---*---+A0 |1 +--+ 16| VCC |/OE| A | B |/Y |/Y0 |2 15| A5 +===+===+===*===+A1 |3 14| /Y5 | 1 | X | X | Z |/OE |4 13| A4 | 0 | 0 | 0 | 1 |/Y1 |5 4502 12| B | 0 | 1 | 0 | 0 |A2 |6 11| /Y4 | 0 | X | 1 | 0 |/Y2 |7 10| A3 +---+---+---*---+GND |8 9| /Y3+----------+45032/4-bit 3-state noninverting buffer/line driver.+---+--+---+ +---+---*---+/1OE |1 +--+ 16| VCC |/OE| A | Y |1A1 |2 15| /2OE +===+===*===+1Y1 |3 14| 2A2 | 1 | X | Z |1A2 |4 13| 2Y2 | 0 | 0 | 0 |1Y2 |5 4503 12| 2A1 | 0 | 1 | 1 |1A3 |6 11| 2Y1 +---+---*---+1Y3 |7 10| 1A4GND |8 9| 1Y4+----------+4508Dual 4-bit 3-state transparent latch with reset.+-----+--+-----+ +---+---+---*---+1RST |1 +--+ 24| VCC |/OE| LE| D | Q |1LE |2 23| 2Q3 +===+===+===*===+/1OE |3 22| 2D3 | 1 |... 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