UDA1340, Elektronika, elementy

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INTEGRATED CIRCUITS
DATA SHEET
UDA1340
Low-voltage low-power stereo
audio CODEC with DSP features
1997 Jul 09
Preliminary specification
Supersedes data of 1997 May 20
File under Integrated Circuits, IC01
                                       Philips Semiconductors
Preliminary specification
Low-voltage low-power stereo audio
CODEC with DSP features
UDA1340
FEATURES
General
·
Low power consumption
·
3.0 V power supply
·
256, 384 and 512f
s
system clock
·
Small package size (SSOP28)
·
ADC plus integrated high pass filter to cancel DC offset
·
Overload detector for easy record level control
GENERAL DESCRIPTION
·
Separate power control for ADC and DAC
The UDA1340 is a single-chip stereo Analog-to-Digital
Converter (ADC) and Digital-to-Analog Converter (DAC)
with signal processing features employing bitstream
conversion techniques. The low power consumption and
low voltage requirements make the device eminently
suitable for use in low-voltage low-power portable digital
audio equipment which incorporates recording and
playback functions.
The UDA1340 supports the I
2
S-bus data format with word
lengths of up to 20 bits, the MSB-justified data format with
word lengths of up to 20 bits and the LSB justified serial
data format with word lengths of 16, 18 and 20 bits.
The UDA1340 has special sound processing features in
playback mode, de-emphasis, volume, bass boost, treble,
and soft mute, which can be controlled via the
microcontroller interface.
·
Integrated digital filter plus DAC
·
No analog post filter required for DAC
·
Easy application
·
Functions controllable by microcontroller interface.
Multiple format input interface
·
I
2
S-bus, MSB-justified and LSB-justified format
compatible
·
1f
s
input and output format data rate.
DAC digital sound processing
·
Digital volume control
·
Digital tone control, bass boost and treble
·
dB-linear volume and tone control (low microcontroller
load)
·
Digital de-emphasis for 32, 44.1 and 48 kHz f
s
·
Soft mute.
Advanced audio configuration
·
Stereo single-ended input configuration
·
Stereo line output (under microcontroller volume
control)
·
Power-down click prevention circuitry
·
High linearity, dynamic range, low distortion.
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
UDA1340M
SSOP28
plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
1997 Jul 09
2
                    Philips Semiconductors
Preliminary specification
Low-voltage low-power stereo audio
CODEC with DSP features
UDA1340
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
V
DDA(ADC)
ADC analog supply voltage
2.7
3.0
3.6
V
V
DDA(DAC)
DAC analog supply voltage
2.7
3.0
3.6
V
V
DDO
operational amplifiers supply voltage
2.7
3.0
3.6
V
V
DDD
digital supply voltage
2.7
3.0
3.6
V
I
DDA(ADC)
ADC supply current
-
4.5
-
mA
I
DDA(DAC)
DAC supply current
-
3.5
-
mA
I
DDO
operational amplifier supply current
-
4
-
mA
I
DDD
digital supply current
-
6
-
mA
I
PD(ADC)
digital ADC power-down supply current
-
3
-
mA
I
PD(DAC)
digital DAC power-down supply current
-
3
-
mA
T
amb
operating ambient temperature
-
20
-
+85
°
C
Analog-to-digital converter
V
I(rms)
input voltage (RMS value)
-
0.8
-
V
(THD + N)/S
total harmonic distortion plus
noise-to-signal ratio
at 0 dB
-
-
85
-
80
dB
at
-
60 dB; A-weighted
-
-
35
-
30
dBA
S/N
signal-to-noise ratio
V
i
= 0 V; A-weighted
-
95
-
dBA
a
cs
channel separation
-
100
-
dB
Digital-to-analog converter
V
o(rms)
output voltage (RMS value)
-
0.8
-
V
(THD + N)/S
total harmonic distortion plus
noise-to-signal ratio
at 0 dB
-
-
85
-
80
dB
at
-
60 dB; A-weighted
-
-
35
-
dBA
S/N
signal-to-noise ratio
code = 0; A weighted
100
dBA
-
-
a
cs
channel separation
-
100
-
dB
Power performance
P
ADDA
power consumption in record and
playback mode
-
54
-
mW
P
DA
power consumption in playback only
mode
-
33
-
mW
P
AD
power consumption in record only
mode
-
27
-
mW
P
PD
power consumption in power-down
mode
-
6
-
mW
1997 Jul 09
3
 Philips Semiconductors
Preliminary specification
Low-voltage low-power stereo audio
CODEC with DSP features
UDA1340
BLOCK DIAGRAM
V
DDA(ADC)
V
SSA(ADC)
V
ADCP
V
ADCN
V
ref(A)
handbook, full pagewidth
2
1
7
6
4
3
5
VINR
VINL
ADC
ADC
8
TEST1
10
UDA1340
DECIMATION FILTER
21
V
DDD
TEST2
20
11
TEST3
V
SSD
DC-CANCELLATION FILTER
18
16
17
19
13
DATAO
BCK
WS
DATAI
L3MODE
14
L3-BUS
INTERFACE
DIGITAL INTERFACE
L3CLOCK
15
L3DATA
12
SYSCLK
9
DSP FEATURES
OVERFL
INTERPOLATION FILTER
NOISE SHAPER
DAC
DAC
26
24
VOUTL
VOUTR
25
27
23
22
28
MGG839
V
DDO
V
SSO
V
DDA(DAC)
V
SSA(DAC)
V
ref(D)
Fig.1 Block diagram.
1997 Jul 09
4
Philips Semiconductors
Preliminary specification
Low-voltage low-power stereo audio
CODEC with DSP features
UDA1340
PINNING
SYMBOL
PIN
Description
V
SSA(ADC)
1
ADC analog ground
V
DDA(ADC)
2
ADC analog supply voltage
VINL
3
ADC input left
V
ref(A)
4
ADC reference voltage
VINR
5
ADC input right
handbook, halfpage
V
SSA(ADC)
1
28
V
ref(D)
V
ADCN
6
ADC negative reference voltage
V
DDA(ADC)
VINL
2
27
V
SSO
VOUTL
V
ADCP
7
ADC positive reference voltage
TEST1
8
test control 1 (pull-down)
3
26
OVERFL
9
overload flag output
V
ref(A)
VINR
V
DDO
4
25
V
DDD
10
digital supply voltage
VOUTR
5
24
V
SSD
11
digital ground
V
ADCN
6
23
V
DDA(DAC)
SYSCLK
12
system clock 256, 384 or 512f
s
V
ADCP
7
22
V
SSA(DAC)
L3MODE
13
L3-bus mode input
UDA1340
TEST1
8
21
TEST2
L3CLOCK
14
L3-bus clock input
OVERFL
9
20
TEST3
L3DATA
15
L3-bus data input
BCK
16
bit clock input
V
DDD
10
19
DATAI
WS
17
word selection input
V
SSD
SYSCLK
11
18
DATAO
DATAO
18
data output
WS
12
17
DATAI
19
data input
L3MODE
BCK
13
16
TEST3
20
test output
L3CLOCK
14
15
L3DATA
TEST2
21
test control 2 (pull-down)
MGG838
V
SSA(DAC)
22
DAC analog ground
V
DDA(DAC)
23
DAC analog supply voltage
VOUTR
24
DAC output right
V
DDO
25
operational amplifier supply voltage
VOUTL
26
DAC output left
V
SSO
27
operational amplifier ground
Fig.2 Pin configuration.
V
ref(D)
28
DAC reference voltage
1997 Jul 09
5
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